Lattice ECP5 FPGA bitstream creation/analysis/programming tools
https://github.com/YosysHQ/prjtrellis
Project Trellis enables a fully open-source flow for ECP5 FPGAs using
Yosys for Verilog synthesis and nextpnr for place and route. Project
Trellis provides the device database and tools for bitstream creation.
Version: 1.2.1
General Commands | |
| ecpbram | manual page for ecpbram 1.2.1 |
| ecpmulti | manual page for ecpmulti 1.2.1 |
| ecppack | manual page for ecppack 1.2.1 |
| ecppll | manual page for ecppll 1.2.1 |
| ecpunpack | manual page for ecpunpack 1.2.1 |