Package alliance-libs

Alliance VLSI CAD System - Libraries

https://soc-extras.lip6.fr/en/alliance-abstract-en/

Architecture dependent files for the Alliance VLSI CAD Sytem.

File Formats (Section 5)
al.5alc
The .al format is the ALLIANCE format for the logical view of a cell.
ap.5alc
file ::= version header connectors segments instances transistors patterns end_of_file version ::= 'V ALLIANCE 2.2 SETUP : ' version_number header ::= 'H ' name...
catal.5alc
catalog file format
ctl.5alc
This document describes the CTL file format used by moka(1) for model checking of finite states machine description. This CTL file format subset is defined to...
fsm.5alc
This document describes the Alliance VHDL subset for Finite State Machine description. This FSM subset is neither accepted by the logic simulator asimut(1), nor...
lax.5alc
The .lax file contains user modifiable parameters that lead to different logic synthesis.
pat.5alc
The pat is a specific format used in simulation patternĀ“s description. pat format has been designed to represent undifferently patterns to be simulated or...
prol.5alc
This file describes the rules used by the mbk(1) to rds translator. In the following file, symbolic layout objects are referred as mbk(1) objects, mbk(1) being...
spi.5alc
The description of a netlist foo must be contained in a .SUBCKT of a file named foo.spi. This description can include others .SUBCKT that must be in the same...
sxlib.5alc
sxlib library contains standard cells that have been developed at UPMC-ASIM/LIP6. This manual gives the list of available cells, with their behavior, width...
vasy.5alc
This document describes the VHDL subset accepted by VASY for RTL descriptions. CONCURRENT STATEMENTS In an RTL architecture most of the concurrent statements...
vbe.5alc
This document describes the ALLIANCE VHDL subset for behavioural data flow descriptions. CONCURRENT STATEMENTS In a data flow architecture only concurrent...
vhdl.5alc
The ALLIANCE VHDL subset is dedicated to digital synchronous circuits design.
vst.5alc
This document describes the ALLIANCE VHDL subset for structural descriptions. The declaration part of a structural description includes signal decalarations and...