ck_pr_fence_atomic man page

ck_pr_fence_atomic ā€” enforce partial ordering of atomic read-modify-write operations

Library

Concurrency Kit (libck, -lck)

Synopsis

#include <ck_pr.h>

void
ck_pr_fence_atomic(void);

void
ck_pr_fence_strict_atomic(void);

Description

The ck_pr_fence_atomic() function enforces the ordering of any atomic read-modify-write operations relative to the invocation of the function. This function always serve as an implicit compiler barrier. On architectures implementing CK_MD_TSO, this operation only serves as a compiler barrier and no fences are emitted. On architectures implementing CK_MD_PSO and CK_MD_RMO, a store fence is emitted. To force the unconditional emission of a fence, use ck_pr_fence_strict_atomic().

Example


#include <ck_pr.h> 
 
static int a = 0; 
static int b = 0; 
static int c = 0; 
 
void 
function(void) 
{ 
 
	ck_pr_fas_int(&a, 1); 
 
	/* 
	 * Guarantee that the update to a is completed 
	 * with respect to the updates of b and c. 
	 */ 
	ck_pr_fence_atomic(); 
	ck_pr_fas_int(&b, 2); 
	ck_pr_fas_int(&c, 2); 
 
	return; 
}

Return Values

This function has no return value.

See Also

ck_pr_stall(3), ck_pr_fence_atomic_store(3), ck_pr_fence_atomic_load(3), ck_pr_fence_store(3), ck_pr_fence_load(3), ck_pr_fence_load_atomic(3), ck_pr_fence_load_store(3), ck_pr_fence_load_depends(3), ck_pr_fence_memory(3), ck_pr_barrier(3), ck_pr_fas(3), ck_pr_load(3), ck_pr_store(3), ck_pr_faa(3), ck_pr_inc(3), ck_pr_dec(3), ck_pr_neg(3), ck_pr_not(3), ck_pr_add(3), ck_pr_sub(3), ck_pr_and(3), ck_pr_or(3), ck_pr_xor(3), ck_pr_cas(3), ck_pr_btc(3), ck_pr_bts(3), ck_pr_btr(3)

Additional information available at http://concurrencykit.org/

Referenced By

ck_pr_fence_acquire(3), ck_pr_fence_atomic_load(3), ck_pr_fence_atomic_store(3), ck_pr_fence_load(3), ck_pr_fence_load_atomic(3), ck_pr_fence_load_depends(3), ck_pr_fence_load_store(3), ck_pr_fence_memory(3), ck_pr_fence_release(3), ck_pr_fence_store(3), ck_pr_fence_store_atomic(3), ck_pr_fence_store_load(3).

May 16, 2013