nvme_register_offsets - Man Page

controller registers for all transports. This is the layout of BAR0/1 for PCIe, and properties for fabrics.

Synopsis

enum nvme_register_offsets {
   NVME_REG_CAP ,

   NVME_REG_VS ,

   NVME_REG_INTMS ,

   NVME_REG_INTMC ,

   NVME_REG_CC ,

   NVME_REG_CSTS ,

   NVME_REG_NSSR ,

   NVME_REG_AQA ,

   NVME_REG_ASQ ,

   NVME_REG_ACQ ,

   NVME_REG_CMBLOC ,

   NVME_REG_CMBSZ ,

   NVME_REG_BPINFO ,

   NVME_REG_BPRSEL ,

   NVME_REG_BPMBL ,

   NVME_REG_CMBMSC ,

   NVME_REG_CMBSTS ,

   NVME_REG_CRTO ,

   NVME_REG_PMRCAP ,

   NVME_REG_PMRCTL ,

   NVME_REG_PMRSTS ,

   NVME_REG_PMREBS ,

   NVME_REG_PMRSWTP ,

   NVME_REG_PMRMSCL ,

   NVME_REG_PMRMSCU

};

Constants

NVME_REG_CAP

Controller Capabilities

NVME_REG_VS

Version

NVME_REG_INTMS

Interrupt Mask Set

NVME_REG_INTMC

Interrupt Mask Clear

NVME_REG_CC

Controller Configuration

NVME_REG_CSTS

Controller Status

NVME_REG_NSSR

NVM Subsystem Reset

NVME_REG_AQA

Admin Queue Attributes

NVME_REG_ASQ

Admin SQ Base Address

NVME_REG_ACQ

Admin CQ Base Address

NVME_REG_CMBLOC

Controller Memory Buffer Location

NVME_REG_CMBSZ

Controller Memory Buffer Size

NVME_REG_BPINFO

Boot Partition Information

NVME_REG_BPRSEL

Boot Partition Read Select

NVME_REG_BPMBL

Boot Partition Memory Buffer Location

NVME_REG_CMBMSC

Controller Memory Buffer Memory Space Control

NVME_REG_CMBSTS

Controller Memory Buffer Status

NVME_REG_CRTO

Controller Ready Timeouts

NVME_REG_PMRCAP

Persistent Memory Capabilities

NVME_REG_PMRCTL

Persistent Memory Region Control

NVME_REG_PMRSTS

Persistent Memory Region Status

NVME_REG_PMREBS

Persistent Memory Region Elasticity Buffer Size

NVME_REG_PMRSWTP

Memory Region Sustained Write Throughput

NVME_REG_PMRMSCL

Persistent Memory Region Controller Memory Space Control Lower

NVME_REG_PMRMSCU

Persistent Memory Region Controller Memory Space Control Upper

Info

enum nvme_register_offsets July 2022 API Manual