Your company here — click to reach over 10,000 unique daily visitors

rz-asm - Man Page

rizin assembler and disassembler tool


rz-asm[-ABCdDeIEhjLpqrvxw] [-a arch] [-b bits] [-c CPU] [-O file] [-o addr] [-@ addr] [-f file] [-F in:out] [-i len] [-k kernel] [-s syntax] [-l len]


This command is part of the Rizin project.

This tool uses RzAsm to assemble and disassemble files or hexpair strings. It supports a large list of architectures which can be listed using the -L flag.

-a arch

Set architecture to assemble/disassemble (see -L)


Show analysis information from given hexpairs

-b bits

Set CPU register size (8, 16, 32, 64) (RZ_ASM_BITS)


Binary input/output (-l is mandatory for binary input)

-c CPU

Select specific CPU (depends on the arch)


Output in C format

-d, -D

Disassemble from hexpair bytes (-D show hexpairs)


Use big endian instead of little endian


Display lifted RzIL code (same input as in -d, IL is also validated)


Display ESIL expression (same input as in -d)

-f file

Read data from file

-F in:out

Specify input and/or output filters (att2intel, x86.pseudo, ...)

-h, -hh

Show usage help message, hh for long

-i len

Ignore N bytes of the input buffer


Output in JSON format

-k kernel

Select operating system (linux, windows, darwin, ..)

-l len

Input/Output length


List asm plugins: (a=asm, d=disasm, A=analyze, e=ESIL)

-o, -@ addr

Set start address for code (default 0)

-O file

Output file name (rz-asm -Bf a.asm -O a)


Run SPP over input for assembly


Quiet mode


Output in rizin commands

-s syntax

Select syntax (intel, att)


Show version information


Use hex dwords instead of hex pairs when assembling


Describe opcode



Use Intel syntax rather than AT&T


Use AT&T syntax rather than Intel

.align number

Set the code or data alignment

.arch name

Set the code architecture


Set the ARM mode (as opposed to Thumb) for ARM architecture

.ascii string

Define the ASCII string

.asciz string

Define the zero-ending ASCII string

.bits number

Define the code bitness


Set the BE (big endian) byte order

.cpu name

Set the CPU for the chosen architecture


Mark the start of the data section

.endian 1|0

Set the endianness (the byte order) - 1 is BE, 0 is LE

.equ name value

Define the constant

.fill repeat,size,value

Fill the data with the repeating value pattern

.hex data

Define the data in hexadecimal format

.incbin filename

Include binary file

.int16 number

Define 16-bit integer

.int32 number

Define 32-bit integer

.int64 number

Define 64-bit integer

.kernel name

Set the kernel for syscalls


Set the LE (little endian) byte order

.org value

Set the value of the PC (Program Counter) register

.os name

Set the operating system for syscalls

.short number

Define 16-bit integer

.string string

Define the ASCII string


Mark the start of the text section


Set the Thumb mode (as opposed to ARM) for ARM architecture


Assemble opcode:

rz-asm -a x86 -b 32 'mov eax, 33'

Disassemble opcode:

rz-asm -d 90

See Also

rizin(1), rz-find(1), rz-hash(1), rz-bin(1), rz-diff(1), rz-gg(1), rz-run(1), rz-ax(1),


pancake <pancake@nopcode.org>


Referenced By

rizin(1), rz-ax(1), rz-bin(1), rz-diff(1), rz-find(1), rz-gg(1), rz-hash(1), rz-run(1), rz-sign(1).

January 22, 2024