flatbeh root_structural_file [ output_file ]
This software belongs to the ALLIANCE CAD system from the
CAO-VLSI team at MASI laboratory, University P. et M. Curie
4, place Jussieu ; 75252 PARIS Cedex 05 ; FRANCE
Fax: (33-1) 184.108.40.206 ; E-mail: firstname.lastname@example.org
flatbeh synthetize a VHDL behavioral data-flow description from a structural description. It flattens the structural description (it can be a hierarchy of macro block) until the cells which have a behavioral description. Then it raise all the equations and create a behavioral description of the root file.
root_structural_file is the filename of the root of the structural description file.
output_file is the destination filename for behavioural description.
list of directories containing descriptions. The default path is the current directory (see mbk(1)).
Indicates the file where the behavioral description files are given. This serves to flatbeh to stop the flatten of the structural root circuit.(see mbk(1))
file extension for structural entity. (see mbk(1))
Please e-mail to email@example.com for bug report and suggestions.